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In ECL the fanout capability is __________

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In ECL the fanout capability is __________

(a) High

(b) Low

(c) Zero

(d) Sometimes high and sometimes low

I had been asked this question in my homework.

The doubt is from Emitter-Coupled Logic(ECL) topic in portion Logic Families of Digital Circuits

1 Answer

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Best answer
The correct option is (a) High

The best I can explain: If the input impedance is high and the output resistance is low; as a result, the transistors change states quickly, gate delays are low, and the fanout capability is high. Fan-out is the measure of the maximum number of inputs that a single gate output can accept.

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