For a 4-bit parallel adder, if the carry-in is connected to a logical HIGH, the result is ___________
(a) The same as if the carry-in is tied LOW since the least significant carry-in is ignored
(b) That carry-out will always be HIGH
(c) A one will be added to the final result
(d) The carry-out is ignored
This question was posed to me during a job interview.
This key question is from 4-Bit Parallel Adder/Subtractor in division Arithmetic Circuits of Digital Circuits