Question

For realisation of JK flip-flop from SR flip-flop, if J=0 & K=0 then the input is ___________

(a) S=0, R=0

(b) S=0, R=X

(c) S=X, R=0

(d) S=X, R=X

The question was posed to me at a job interview.

Origin of the question is Realisation of one Flip-flop using other Flip-flops topic in chapter Flip-Flops of Digital Circuits

Answer 1

Right choice is (b) S=0, R=X

Easiest explanation: If J=0 & K=0, the output will be as: Q(n)=0, Q(n+1)=0 and it is fed into both the AND gates which results as S=0 & R=X(i.e. don’t care).