Question

What happens to the parallel output word in an asynchronous binary down counter whenever a clock pulse occurs?

(a) The output increases by 1

(b) The output decreases by 1

(c) The output word increases by 2

(d) The output word decreases by 2

I got this question during an online interview.

Origin of the question is Asynchronous Counter topic in division Counters of Digital Circuits

Answer 1

Correct answer is (b) The output decreases by 1

Easiest explanation: In an asynchronous counter, there isn’t any clock input. The output of 1^st flip-flop is given to second flip-flop as clock input. So, in case of binary down counter the output word decreases by 1.