Question

What is meant by the parallel load of a shift register?

(a) All FFs are preset with data

(b) Each FF is loaded with data, one at a time

(c) Parallel shifting of data

(d) All FFs are set with data

This question was addressed to me in an international level competition.

Question is taken from Shift Registers in division Registers of Digital Circuits

Answer 1

The correct option is (a) All FFs are preset with data

For explanation I would say: At Preset condition, outputs of flip-flops will be 1. Preset = 1 means Q = 1, thus input is definitely 1.