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A Common drain amplifier is designed using fixed bias configuration, what is its input impedance?

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A Common drain amplifier is designed using fixed bias configuration, what is its input impedance?

(a) RD + rd

(b) RG

(c) RD || rd

(d) 0

I have been asked this question in class test.

Question is from The Common Drain Amplifier topic in portion Field-Effect Transistors of Electronic Devices & Circuits

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The correct answer is (b) RG

To explain: From the ac small signal model, the input impedance of FET is open circuit.

Gate resistance RG  is in parallel with open circuit resulting in Zin=∞||RG=RG.

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