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Which mode of operation selects an internal page of memory in the DRAM interfacing?

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Which mode of operation selects an internal page of memory in the DRAM interfacing?

(a) page interleaving

(b) page mode

(c) burst mode

(d) EDO RAM

This question was addressed to me in an international level competition.

My question is from DRAM Interfaces topic in portion Memory Systems of Embedded Systems

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Right choice is (b) page mode

The explanation: In the page mode operation, the row address is provided as normal but the RAS signal is left asserted. This, in turn, selects an internal page within the DRAM memory where any bit of data can be accessed by placing the column address and asserting CAS.

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