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How is memory accessed in RISC architecture?

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How is memory accessed in RISC architecture?

(a) load and store instruction

(b) opcode instruction

(c) memory instruction

(d) bus instruction

I had been asked this question in a national level competition.

This interesting question is from RISC Processor topic in chapter Embedded Processors of Embedded Systems

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Right choice is (a) load and store instruction

Explanation: The data of memory address is loaded into a register and manipulated, its contents are written out to the main memory.

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