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Which bit controls the machine check exceptions?

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Which bit controls the machine check exceptions?

(a) ME

(b) FE0

(c) FE1

(d) EE

I have been asked this question by my college director while I was bunking the class.

My question is from RISC Exceptions-II topic in division Interrupts and Exceptions of Embedded Systems

1 Answer

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Best answer
Correct option is (a) ME

To explain I would say: The ME bit in the MSR controls the machine check interrupts.

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