Question

Which of the following is the biggest challenge in the cache memory design?

(a) delay

(b) size

(c) coherency

(d) memory access

The question was posed to me in class test.

My query is from Writing Scheme of Cache Memory in division Memory Systems of Embedded Systems

Answer 1

Correct choice is (c) coherency

To elaborate: The coherency is a major challenge in designing the cache memory. The cache has to be designed by solving the problem of data coherency while remaining hardware and software compatible.