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In which model, the effect of instruction is simulated and their timing is not considered?

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In which model, the effect of instruction is simulated and their timing is not considered?

(a) gate-level model

(b) circuit model

(c) coarse-grained model

(d) layout model

The question was asked in an online interview.

I need to ask this question from Levels of Hardware Modelling topic in section Specification of Embedded Systems

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The correct choice is (c) coarse-grained model

The explanation: The coarse-grained model is a kind of the instruction set level modelling in which only the effect of instruction is simulated and the timing is not considered. The information which is provided in the manual is sufficient for this type of modelling.

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