Question

What is the disadvantage of a level triggered pulse?

(a) a constant pulse is to be maintained for a greater span of time

(b) another interrupt may be generated if the low-level signal is not removed before the ISR is finished

(c) it is difficult to produce

(d) another interrupt may be caused if the signal is still low before the completion of the last instruction

The question was asked in an interview for internship.

Question is from Interrupt Programming in division 8051 Microcontroller of Microcontroller

Answer 1

Correct option is (d) another interrupt may be caused if the signal is still low before the completion of the last instruction

For explanation: In a level triggered interrupt, if the low signal at interrupt pin must be removed before the execution of last instruction of the ISR i.e. RETI. If low signal at interrupt pin is not removed before completing the ISR then it will be generating another interrupt.