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The compiler reorders the sequential stream of code that is coming from memory into a fixed size instruction group in

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The compiler reorders the sequential stream of code that is coming from memory into a fixed size instruction group in

(a) super pipelined architecture

(b) multiple instruction issue

(c) very long instruction word architecture

(d) super scalar architecture

I have been asked this question in class test.

I'm obligated to ask this question of Features of 80586 (Pentium), Concepts of Computer Architecture, Branch Prediction in section Recent Advancements in Microprocessor Architecture of Microprocessor

1 Answer

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The correct answer is (c) very long instruction word architecture

For explanation: In VLIW processors, the compiler reorders the sequential stream of code that is coming from memory into a fixed size instruction group, and issues them in parallel for execution.

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