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If there is a trace cache miss, then the instruction bytes are required to be fetched from the

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in Microprocessor by (39.4k points)
If there is a trace cache miss, then the instruction bytes are required to be fetched from the

(a) instruction decoder

(b) Level2 cache

(c) execution module

(d) none of the mentioned

I had been asked this question in an online interview.

Asked question is from Netburst Microarchitecture For Pentium4 -2,  Instruction Translation Lookaside Buffer (ITLB) and Branch Prediction topic in chapter Pentium 4 processor of Microprocessor

1 Answer

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by (49.2k points)
Right option is (b) Level2 cache

Easy explanation: If there is a trace cache miss, then the instruction bytes are required to be fetched from the Level2 cache.

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