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The on-chip cache is controlled by

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in Microprocessor by (39.4k points)
The on-chip cache is controlled by

(a) Cache disable(CD)

(b) No write through(NW)

(c) Cache disable and No write through

(d) None of the mentioned

I got this question in final exam.

This question is from Numeric Coprocessor topic in portion 32-bit Processors-80386, 80387 and 80486 of Microprocessor

1 Answer

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by (49.2k points)
The correct answer is (c) Cache disable and No write through

Easiest explanation: Cache disable(CD) and No write through(NW) bits of control register CR0. To completely disable cache, the CD and NW bits must be 11.

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