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The mcs 51 architecture supports

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in Microprocessor by (39.4k points)
The mcs 51 architecture supports

(a) serial transmission and reception

(b) simultaneous transmission and reception

(c) transmission and reception of data using serial communication interface

(d) all of the mentioned

I have been asked this question in exam.

My question is from Serial Communication Unit in division Microcontroller 8051 of Microprocessor

1 Answer

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by (49.2k points)
Right answer is (d) all of the mentioned

The best I can explain: The mcs 51 architecture supports simultaneous transmission and reception of binary data byte by byte i.e. full duplex mode of communication. It supports serial transmission and reception of data using standard serial communication interface and baud rates.

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