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The Status flag circuit is implemented using _____

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The Status flag circuit is implemented using _____

(a) RS flip flop

(b) D flip flop

(c) JK flip flop

(d) Xor circuit

This question was addressed to me in semester exam.

This is a very interesting question from Parallel Port topic in chapter Input/Output Organisation of Computer Architecture

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The correct choice is (b) D flip flop

To explain I would say: The circuit is implemented using the edge triggered D flip flop, that is triggered on the rising edge of the valid signal.

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