The instruction, ADD R1, R2, R3 is decoded as ___________
(a) R1<-[R1]+[R2]+[R3]
(b) R3<-[R1]+[R2]
(c) R3<-[R1]+[R2]+[R3]
(d) R1<-[R2]+[R3]
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Question is from Intel IA-32 Pentium Architecture-1 topic in portion Processor Families of Computer Architecture