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Which bit in control register defines the address bit or idle line multiprocessor protocol mode?

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Which bit in control register defines the address bit or idle line multiprocessor protocol mode?

(a) MM

(b) URXWIE

(c) URXIE

(d) RXWake

I had been asked this question in an online quiz.

Question is taken from USART Protocol in portion Internet Principles of IOT

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The correct choice is (a) MM

To explain I would say: The MM bit in control register defines the address bit or idle line multiprocessor protocol mode. Both formats use the wake up on transmitting, using the address feature function (TWWake bit), and on activating the RXWake bit.

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