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On a J-K flip-flop, when is the flip-flop in a hold condition?

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On a J-K flip-flop, when is the flip-flop in a hold condition?

(a) J = 0, K = 0

(b) J = 1, K = 0

(c) J = 0, K = 1

(d) J = 1, K = 1

This question was addressed to me during an online exam.

My question is from Flip Flops in section Flip-Flops of Digital Circuits

1 Answer

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The correct option is (a) J = 0, K = 0

For explanation: At J=0 k=0 output continues to be in the same state. This is the memory storing state.

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