Which of the following describes the operation of a positive edge-triggered D flip-flop?
(a) If both inputs are HIGH, the output will toggle
(b) The output will follow the input on the leading edge of the clock
(c) When both inputs are LOW, an invalid state exists
(d) The input is toggled into the flip-flop on the leading edge of the clock and is passed to the output on the trailing edge of the clock
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Enquiry is from D Flip Flop in division Flip-Flops of Digital Circuits