A positive edge-triggered D flip-flop will store a 1 when ________
(a) The D input is HIGH and the clock transitions from HIGH to LOW
(b) The D input is HIGH and the clock transitions from LOW to HIGH
(c) The D input is HIGH and the clock is LOW
(d) The D input is HIGH and the clock is HIGH
I have been asked this question in my homework.
The origin of the question is D Flip Flop in chapter Flip-Flops of Digital Circuits