In a parallel in/parallel out shift register, D0 = 1, D1 = 1, D2 = 1, and D3 = 0. After three clock pulses, the data outputs are ________
(a) 1110
(b) 0001
(c) 1100
(d) 1000
This question was addressed to me by my school principal while I was bunking the class.
Query is from Shift Register Counters topic in portion Registers of Digital Circuits