Question

How many supervisor registers are associated with the exception mode?

(a) 2

(b) 3

(c) 4

(d) 5

I had been asked this question by my college director while I was bunking the class.

The above asked question is from RISC Exceptions topic in portion Interrupts and Exceptions of Embedded Systems

Answer 1

The correct choice is (a) 2

The explanation: When the exception is recognised, the address of the instruction and the machine state register(MSR) are stored in the supervisor registers in the exception mode. There are two supervisor registers SRR0 and SRR1.