If the logical processors want to execute complex IA-32 instructions simultaneously then the number of microcode instruction pointers required is
(a) 1
(b) 2
(c) 3
(d) 4
This question was addressed to me in a job interview.
This question is from Netburst Microarchitecture For Pentium4 -2, Instruction Translation Lookaside Buffer (ITLB) and Branch Prediction topic in division Pentium 4 processor of Microprocessor