Question

If the external interrupts are programmed edge sensitive, then they should remain high for atleast

(a) 0 machine cycle

(b) 2 machine cycles

(c) 1 machine cycle

(d) 3 machine cycles

This question was addressed to me during an interview.

The origin of the question is Interrupt and Stack of 8051 -1 in chapter Microcontroller 8051 of Microprocessor

Answer 1

The correct option is (c) 1 machine cycle

The best I can explain: If the external interrupts are programmed edge sensitive, then they should remain high for atleast one machine cycle and low for atleast one machine cycle, for being sensed.