For deriving chip selects of isolated memory or IO devices, the gates that are traditionally used are
(a) NOR and NAND
(b) NAND and NOT
(c) NOT and NOR
(d) AND, OR and NOT
This question was addressed to me in an online quiz.
I want to ask this question from Interfacing With 8051 Ports -2 topic in chapter Microcontroller 8051 of Microprocessor