Question

If \(\frac{1}{2}\)µnCox*(W/L) = K and λ=0 for the C.S. stage shown below, what is the voltage gain (ideally)?

(a) (R2 || R3 || R4) * 3K * (V1 – 2Vth)

(b) (R2 || R3 || R4) * K * (V1 + Vth)

(c) (R2 || R3 || R4) * 2K * (V1 – Vth)

(d) (R2 || R3 || R4) * K * (V1 – Vth)

This question was posed to me in an interview.

Asked question is from MOSFET Amplifier with CS Configuration topic in section FET Amplifiers of Analog Circuits

Answer 1

Right choice is (d) (R2 || R3 || R4) * K * (V1 – Vth)

The explanation is: Ideally, the bypass capacitor would short the source terminal of the M1 to ground. Hence, this becomes a simple C.S. stage instead of a degenerated C.S. stage. Hence, the gain is simply gm*(total resistance connected at the drain). The total resistance connected at the drain is (R2 || R3 || R4) since all the three resistors are parallel to each other. The transconductance(gm) is K(V1-Vth). Hence the overall voltage gain is (R2 || R3 || R4) * K * (V1 – Vth).