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The maximum noise voltage that may appear at the input of a logic gate without changing the logical state of its output is termed as __________

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The maximum noise voltage that may appear at the input of a logic gate without changing the logical state of its output is termed as __________

(a) Noise Margin

(b) Noise Immunity

(c) White Noise

(d) Signal to Noise Ratio

The question was posed to me in an international level competition.

Query is from Digital Integrated Circuits topic in chapter Boolean Algebra and Minimization Techniques and Logic Gates of Digital Circuits

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The correct option is (b) Noise Immunity

The best I can explain: The maximum noise voltage that may appear at the input of a logic gate without changing the logical state of its output is termed as noise immunity.

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