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When both inputs of SR latches are high, the latch goes ___________

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When both inputs of SR latches are high, the latch goes ___________

(a) Unstable

(b) Stable

(c) Metastable

(d) Bistable

The question was posed to me in an interview for internship.

Asked question is from Latches in chapter Flip-Flops of Digital Circuits

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Correct choice is (c) Metastable

The explanation is: When both gates are identical and this is “metastable”, and the device will be in an undefined state for an indefinite period.

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