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In a NAND based S’-R’ latch, if S’=1 & R’=1 then the state of the latch is ____________

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In a NAND based S’-R’ latch, if S’=1 & R’=1 then the state of the latch is ____________

(a) No change

(b) Set

(c) Reset

(d) Forbidden

I have been asked this question by my college director while I was bunking the class.

I need to ask this question from Flip Flops in chapter Flip-Flops of Digital Circuits

1 Answer

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Correct answer is (a) No change

The explanation is: In a NAND based S’-R, latch if S’=1 & R’=1 then there is no any change in the state. It remains in its prior state. This state is used for the storage of data.

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