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In shared bus architecture, the required processor(s) to perform a bus cycle, for fetching data or instructions is

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In shared bus architecture, the required processor(s) to perform a bus cycle, for fetching data or instructions is

(a) one processor

(b) two processors

(c) more than two processors

(d) none of the mentioned

I got this question in final exam.

Enquiry is from Interconnection Topologies in portion Multimicroprocessor Systems of Microprocessor

1 Answer

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by (49.2k points)
The correct option is (a) one processor

The explanation is: In a shared bus architecture, only one processor performs bus cycle to fetch instructions or data from the memory.

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