The number of CPIs(Clock Per Instruction) for an instruction of RISC processors is
(a) 0
(b) 1
(c) 2
(d) 3
I got this question in a dream while sleeping
Query is from Hybrid Architecture -RISC and CISC Convergence, Advantages of RISC, Design Issues of RISC Processors -2 topic in chapter RISC Architecture of Microprocessor