Which of the following is not true about RISC processors?
(a) addressing modes are less
(b) pipelining is key for high speed
(c) microcoding is required
(d) single machine cycle instructions
This question was addressed to me in an interview.
I'd like to ask this question from Hybrid Architecture -RISC and CISC Convergence, Advantages of RISC, Design Issues of RISC Processors -2 topic in section RISC Architecture of Microprocessor