Question

The NMI pin should remain high for atleast

(a) 4 clock cycles

(b) 3 clock cycles

(c) 1 clock cycle

(d) 2 clock cycles

I have been asked this question during an internship interview.

The question is from Non Maskable Interrupt and Maskable Interrupt (INTR) in portion Special Architectural Features and Related Programming of Microprocessor

Answer 1

The correct option is (d) 2 clock cycles

Explanation: The NMI pin should remain high for atleast 2 clock cycles and need not be synchronized with the clock for being sensed.