If complex instructions like interrupt handling, string manipulation appear, then the control from trace cache transfers to
(a) microcode ROM
(b) front end branch predictor
(c) execution module
(d) instruction decoder
I had been asked this question in semester exam.
My query is from Features of Pentium 4, Netburst Microarchitecture For Pentium4 -1 topic in section Pentium 4 processor of Microprocessor