The number of clockcycles that take to wait until the length of the instruction is known in order to start decoding is
(a) 0
(b) 1
(c) 2
(d) 3
I have been asked this question at a job interview.
This key question is from Hybrid Architecture -RISC and CISC Convergence, Advantages of RISC, Design Issues of RISC Processors -1 topic in chapter RISC Architecture of Microprocessor