Question

A 4 bit modulo-16 ripple counter uses JK flip-flops. If the propagation delay of each flip-flop is 50 nsec, the maximum clock frequency that can be used is equal to __________

(a) 20 MHz

(b) 10 MHz

(c) 5 MHz

(d) 4 MHz

The question was asked in examination.

My question is based upon Counter Implementation and Applications topic in portion Counters of Digital Circuits

Answer 1

Correct choice is (c) 5 MHz

The best explanation: Since a counter is constructed using flip-flops, therefore, the propagation delay in the counter occurs only due to the flip-flops. Each bit has propagation delay = 50ns. So, 4 bits or FFs = 50ns * 4 = 200ns. Clock frequency = 1/200ns = 5 MHz.