Question

The LOCK (active low) signal is activated during

(a) Ti of first INTA cycle

(b) Ts of first INTA cycle

(c) Th of second INTA cycle

(d) Ts of second INTA cycle

The question was asked in examination.

The above asked question is from Priority of Bus Use By 80286, Bus Hold and HLDA Sequence, Interrupt Acknowledge Sequence topic in chapter 80286-80287-A Microprocessor with Memory Management and Protection of Microprocessor

Answer 1

Correct choice is (b) Ts of first INTA cycle

The explanation: The LOCK (active low) signal is activated during Ts of first INTA cycle.